Mentor Graphics Releases New Version of 'HyperLynx®'
Signal and power integrity, 3D-electromagnetic solving and high-speed rule checking capabilities, integrated verification

“The new version of HyperLinx is the result of Mentor’s continued investment in high-speed tools.”

Mentor Graphics Korea (CEO Young-In Yang) announced the release of a new version of its PCB design verification solution, 'HyperLynx®'.

The latest version of 'HyperLynx®' integrates signal and power integrity, 3D electromagnetic solving, and high-speed rule checking capabilities into one integrated verification. Building on the widely used HyperLynx signal integrity/power integrity (SI/PI) application, the product provides a complete set of analysis technologies that enable designers to design any type of high-speed digital PCB, the company said.

▲David Wins, Business Development Manager, Mentor Graphics

HyperLynx products include a wide range of underlying simulation engines as well as graphical user interfaces (GUIs) supporting high-speed/interactive and rigorous batch mode analysis capabilities.

“We use a ‘shift left’ strategy to get our simulations done early in the design process, to get it ‘right the first time,’” said Hans Klos, CEO of Sintecs BV, a Netherlands-based embedded systems developer. “The new HyperLynx integrated environment allows us to do everything in one flow, which is a huge advantage.”

We are investing heavily in hyperlink analysis technology, particularly interconnect modeling.

High-speed PCBs vary greatly in size, layer count, routing density, signaling speed, type of silicon used, and power delivery issues. Most tool sets provided by a single EDA vendor typically require switching between applications and user interfaces for different types of analysis. In contrast, HyperLynx now provides 2D/3D signal and power integrity analysis capabilities in a single application with a single GUI. Users can be simulating a SERDES (Serializer-Deserializer) channel one moment, and the next, switching to decoupling analysis of a large power network by selecting a single new menu item.

Mentor has invested heavily in HyperLynx analysis technology, particularly in interconnect modeling, which now combines an ultra-fast geometry extraction engine with advanced materials modeling (broadband dielectrics, copper surface roughness, etc.) for highly accurate simulations.

“HyperLynx has been a high-speed tool in the industry for a long time. Now it is the most powerful and well-integrated tool available,” said AJ Incorvaia, vice president and general manager of Mentor Graphics’ systems design division. “If there are designers who still think of HyperLynx primarily as ‘fast and easy SI,’ they need to take a serious look at how dramatically it has been enhanced and matured.”

The adoption of SERDES (Serial-Rectangle Streaming Express) technology has dramatically increased the frequencies used for digital signaling, allowing even “mainstream” protocols like PCIe Gen3 to operate at speeds of 8 Gbps. The HyperLinx version provides advanced electromagnetic solvers, including FullWave 3D, to help users keep pace with the ever-increasing speeds of SERDES technology.

Thanks to the tightly integrated 3D engine, users do not need to learn the intricacies of a full-wave solver environment. This integration automatically passes signal and power structure geometries, forms electromagnetic (EM) ports, performs simulations, and includes S-parameter results in the time domain simulation.

The new version of HyperLynx includes several engines, including two 2.5D solvers, the industry's fastest DC/IR drop simulators, and a fast quasi-static 3D solver. These implement a full set of power integrity features, all of which are available as part of the HyperLynx signal integrity functionality within the same application. A second, more advanced 2.5D solver can perform pure power modeling and mixed signal and power modeling. This can be used to improve the accuracy of SI simulations when simultaneous switching noise (SSN) problems are suspected.

Providing a robust commercial implementation of COM for 100GbE signaling

Simulating all the details of signal routing and power delivery on a PCB is a daunting task. Matching pure simulation performance to the specific requirements of standard interfaces and protocols (such as DDRx memory and 100 Gbps Ethernet SERDES) reduces the burden on the user and provides a simplified, concise pass/fail capability for the entire interface.

HyperLinx Wizard for DDRx memory interfaces, leading the way with easy setup, automated full bus simulation and integrated results reporting, has now been extended to DDR4 and LPDDR4 interfaces. HTML-based reporting capabilities allow you to generate design documentation and perform internal web-based 'publishing' of the results.

In the SERDES space, protocols supporting COM (Channel Operating Margin) can be used to check the quality of a link based on a series of specific and complex simulation steps, resulting in a single pass/fail number per channel. The new HyperLynx tool provides the industry’s first robust commercial implementation of COM for 100GbE signaling, with fully automated simulation details.

While remaining true to its roots of ease-of-use and fast interactive analysis, this more powerful version of HyperLynx can efficiently handle very large layouts (including higher stacks, massive net counts, and entire multi-board systems), improves performance on multiprocessors and other simulation engines, and enables caching and reuse of extracted models.