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Voltage rail up/down sequencing is required for stable operation and high efficiency.
Analog methods using regulators are more advantageous than digital implementations.Power sequencing is an essential part of any design. It is particularly important in complex systems that utilize multiple power rails. Modern high-performance processing devices, such as FPGAs, ASICs, PLDs, DSPs, ADCs, and microcontrollers, require multiple voltage rails to power internal circuits like cores, memory, and I/O. Specialized voltage rail power up/down sequencing is required to ensure stable operation and higher efficiency.
Voltage and power scaling technologies implement highly powerful and versatile power management systems in small, high-density integrated circuits to reduce power loss and optimize device temperatures, thereby maintaining high system performance. Adaptive voltage-scaling optimization (AVSO) is one such voltage scaling implementation technology.
There are various methods for AVSO implementation, including digital and analog approaches. The most commonly used method utilizes PMBus or I2C interfaces, which allow ASICs, FPGAs, or microprocessors to operate with appropriate accuracy by programming the initial power supply voltage. Once the processor completes the boot-up sequence, it communicates with the voltage regulator via the PMBus or I2C instruction set. This communication serves to instruct the regulator to adjust the output voltage level to meet the host's performance requirements. The most well-known standard commands are VOUT_COMMAND and VOUT_MARGIN. To facilitate smooth data exchange between them, both the host and the voltage regulator need to implement the same digital communication protocol.
Sometimes, digital implementations are not a viable option due to a lack of hardware, software, or firmware in the end system. For systems where power consumption still needs to be optimized, an analog voltage regulator using a reference input (REFIN) can be considered. TI's TPS548D21 fully integrates a 40A high-performance synchronous step-down converter in an ultra-small 5mm x 7mm stacked-clip QFN package and supports AVSO and full differential sensing (see Figure 1).
Figure 1: TPS548D21 pinout diagram and package bottom side
With the TPS548D21, voltage scaling and sequencing can be managed very easily. The TPS548D21 can operate in tracking (voltage scaling) or sequencing mode through the MODE pin strap configuration.
For voltage scaling/tracking, the reference tracking input (REFIN_TRK) allows the reference voltage of the TPS548D21 to be set from an external reference voltage source (Figure 2). The input impedance must be much lower than 100 kW, but this voltage source can be any voltage between 0 V and 1.25 V. When the external voltage source fluctuates up and down between two voltage levels (between 0.5 V and 1.25 V), the slew rate must be controlled so as not to exceed 1 mV/µsec. Tracking accuracy is possible to less than 1% between 0.5V and 1.25V.
The external sequencing function of the TPS548D21 enables ratioometric sequencing of multiple converters during startup and shutdown by applying the same voltage source to the REFIN_TRK pin of the TPS548D21 (Figure 3). When programming the TPS548D21 to perform external tracking (sequencing), the REFIN_TRK voltage must start from 0V, and the externally applied ramp must ramp when the power-on delay is complete. The ramp time must be longer than 1ms.
Figure 2: Tracking waveform Figure 3: Sequencing waveform
An additional advantage of analog tracking is that, because changes occur immediately, the system response can be improved and power loss reduced without delay between the reference input and the output response.
When powering an ASIC or FPGA, a fully analog approach can be applied to voltage scaling and sequencing management.
When powering an ASIC or FPGA, a fully analog approach can be applied to voltage scaling and sequencing management.
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