LoRa communication, ECC security, machine learning acceleration

Lattice Semiconductor announced the release of a new reference design based on the Lattice iCE40 UltraPlus FPGA device.

A new reference design based on Lattice's iCE40 UltraPlus supports LoRa communication, ECC (elliptic curve cryptography) security, signal aggregation, machine learning, and graphics acceleration.

The iCE40 UltraPlus is a highly energy-efficient computing solution for sensor stitching and repetitive high-speed number crunching, and is effective in reducing the load on application processors (APs), which account for a large proportion of power consumption in battery-powered devices. Lattice’s small form factor, low-cost, low-power FPGAs improve system performance and extend battery life by providing enhanced memory and more DSPs.

“The new iCE40 UltraPlus solution once again demonstrates Lattice’s commitment to continuously providing the resources customers need to rapidly design solutions for new markets,” said CHChee, Senior Marketing Director at Lattice Semiconductor. “With enhanced DSP performance, flexible I/O, and increased memory capacity for buffering, the iCE40 UltraPlus provides additional intelligence and security for smartphones, IoT edge products, and the cloud.”