"The First Signal Determines the System"

Strengthening Fundamentals of Power, Clock, and Reset is Essential

Clock Quality Determines System Stability

[Editor's Note] WaveInsense is a precision measurement solution company that solves on-site challenges. On September 17th, the company will conduct a webinar through e4ds eewebinar on the topic of "Practical Measurement of Power & Boot Sequence: The First Signal Determines the Fate of the System." WaveInsense plans to introduce actual cases where power and boot sequence errors lead to system-wide problems. The company will also emphasize the importance of power rail sequence, stabilization time, Power Good, and clock/reset timing that developers often overlook, while addressing probing mistakes in clock quality and noise measurement. Accordingly, we have arranged an interview with Ja-yeon Hwang, Manager at WaveInsense who will present at this webinar, to discuss the presentation content and precautions to take during embedded development.

■ Please introduce WaveInsense.

WaveInsense is "a company that connects people and technology through advanced precision measurement solutions and creates new value."

Beyond simply supplying equipment, we propose "on-site optimized precision measurement solutions" that enable engineers to solve technical challenges they face in the field.

By combining advanced measurement solutions such as oscilloscopes, RF, and EMI pre-compliance analysis with problem-solving technical support, we firmly support our customers' product development success and sustainable growth.

■ The title of this webinar, "The First Signal Determines the Fate of the System," is very impressive. Are there cases in actual development fields where small issues in Power Sequence or Boot Sequence have led to system-wide failures?

Power Sequence and Boot Sequence problems occur more frequently in development fields than expected, and in particular, they are often not discovered during the development stage but lead to significant cost and workforce losses during mass production.

According to the experience of CTOs, in the multifunction printer field, sufficient verification of SMPS and main core boards was conducted during development for stable operation. However, during mass production, when SMPS from different manufacturers were applied due to supply chain stabilization and cost reduction, boot failures occurred.

In the medical device field, similar cases occurred in systems with multiple power rails and sequentially initialized processes, such as patient monitoring equipment or ultrasound diagnostic devices.

In both field cases, all individual components met specifications, but from a system perspective, combination problems of Power Sequence and Boot Sequence occurred.

■ What is the most commonly overlooked measurement point when embedded system developers debug boot problems?

First, you must verify that conditions for normal CPU boot are in place. One of the most common cases is when the voltage itself appears normal, but timing problems occur in the Boot Sequence because the application order of each power rail and stabilization time are not appropriate.

From power application through CPU Reset release, you should first check the rise order of Power Rails, stabilization time, and Power Good signal.

Along with this, you should also verify that CPU Reset is released after the clock stabilizes. Detailed measurement methods will be introduced at the webinar.

■ We understand you will introduce clock stability, Jitter, and Phase Noise measurement methods at the webinar. What is the background for the increased importance of clock quality management in recent systems using high-speed interfaces, and what precautions should developers take in the field?

At this webinar, Jitter and Phase Noise will be covered only briefly, and we will focus on clock quality, which is fundamental to all data.

As system operating speeds increase, minute Jitter and Noise that were not problematic in the past can now directly affect timing margin and system stability.

During measurement, you should pay attention not only to clock frequency but also to waveform quality, stabilization point, and distortion caused by probing.

■ Power quality issues such as Power Rail Ripple and Ground Noise are inconspicuous but have significant impact on system reliability. What are common measurement mistakes engineers make when using oscilloscopes, and what tips would you offer to avoid them?

The most common mistake is using long ground leads to measure greater noise and ringing than actually exists.

It is important to use ground springs to minimize the probing loop and to appropriately apply measurement bandwidth and probe settings.

■ This webinar is composed of content connecting from boot sequence to the basics of PI (Power Integrity) and SI (Signal Integrity). If you were to pick one core message that participants should definitely take away from this webinar, what would it be?

Most system problems originate from basic elements such as power, clock, and reset.

Since this webinar is meant to strengthen fundamentals for these elements, I would appreciate it if junior hardware and software engineers viewed this as an opportunity to learn the basics of identifying problem sources, and senior engineers viewed it as material to advance more advanced debugging through a back to basics approach.