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High-performance SoCs, accelerating the era of autonomous driving, are rapidly emerging as a key player in the automotive industry.

Google 우선 소스Published2026.01.27 11:00

▲Visualizing ADAS functions for autonomous driving in software-defined vehicles that analyze environmental data (Photo: TI)
TI's TDA5 series SoCs integrate various computational blocks, including the CPU, GPU, and NPU, into a single chip.
Armv9 core lockstep feature meets the highest safety level ASIL-D under ISO26262.

With autonomous driving and advanced driver assistance systems (ADAS) becoming key keywords in the automotive industry, the importance of the semiconductor technology that underpins them is growing more than ever. Recently, automakers are accelerating the transition to software-defined vehicles (SDVs), moving away from distributed electronic control units (ECUs) and embracing centralized computing platforms. At the heart of these changes is a high-performance system-on-chip (SoC) that offers both scalability and performance.

Texas Instruments recently introduced SoCs for next-generation automotive design in a technical article titled, “ Why Scalable, High-Performance SoCs Are the Future of Autonomous Vehicles .”

The automotive industry is already moving beyond SAE Level 1 and 2 autonomous driving standards to Level 3, which goes beyond simple driver assistance to enable conditional autonomy.

To achieve this, computing power capable of processing massive sensor data and performing artificial intelligence (AI) calculations in real time is essential.

A central computing architecture meets these needs, enabling integrated management of vehicle-wide functions on a single, high-performance platform.

The TDA5 series SoC introduced by Texas Instruments (TI) is a representative example of this trend.

This product family integrates various computational blocks, such as CPUs, GPUs, and neural processing units (NPUs), into a single chip based on a heterogeneous computing architecture.

Scalable APU from 10 TOPS up to 1,200 TOPS, especially with TI's proprietary C7™ architecture-based NPU.I provides performance and secures both power efficiency and performance.

This enables a wide range of applications, from basic ADAS functions such as adaptive cruise control to conditional autonomous driving.

Safety is also an essential element in next-generation SoC design.

The TDA5 SoC applies a hardware-based cross-domain safety architecture to support real-time monitoring and error detection that are difficult to implement using software alone.

It is designed to meet ASIL-D, the highest safety level stipulated in ISO 26262, through the lockstep function of the latest Armv9 core.

This is a strategy to address vehicle safety requirements that become increasingly important as autonomous driving functions expand.

Another thing to note is the chiplet-compatible architecture.

The TDA5 series supports the UCIe interface, enabling modular design for future functional expansion or performance enhancement.

This helps automakers flexibly configure different vehicle classes and features based on the same platform.

As a result, it lays the foundation for advanced autonomous driving features, previously only available in premium vehicles, to be expanded to popular models.

Experts predict that within the next 10 years, ADAS and autonomous driving features will become standard features rather than optional features.

High-performance, highly scalable SoCs are the core technologies that enable these changes and will become a factor in determining the competitiveness of the automotive industry.

Within the paradigm of centralized computing and software-defined vehicles, SoCs with scalable AI performance and safety are accelerating the era of autonomous driving.
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